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Microchip Technology /ATSAML11E16A /CoreDebug /DHCSR

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Interpret as DHCSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (C_DEBUGEN)C_DEBUGEN 0 (C_HALT)C_HALT 0 (C_STEP)C_STEP 0 (C_MASKINTS)C_MASKINTS 0 (S_SNAPSTALL)S_SNAPSTALL 0 (S_REGRDY)S_REGRDY 0 (S_HALT)S_HALT 0 (S_SLEEP)S_SLEEP 0 (S_LOCKUP)S_LOCKUP 0 (S_SDE)S_SDE 0 (S_RETIRE_ST)S_RETIRE_ST 0 (S_RESET_ST)S_RESET_ST 0 (S_RESTART_ST)S_RESTART_ST

Description

Debug Halting Control and Status Register

Fields

C_DEBUGEN

Enable Halting debug
C_HALT

Halt processor
C_STEP

Enable single step
C_MASKINTS

Mask PendSV, SysTick and external configurable interrupts
S_SNAPSTALL

Snap stall control
S_REGRDY

Register ready status
S_HALT

Halted status
S_SLEEP

Sleeping status
S_LOCKUP

Lockup status
S_SDE

Secure debug enabled
S_RETIRE_ST

Retire sticky status
S_RESET_ST

Reset sticky status
S_RESTART_ST

Restart sticky status

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data